In astable mode the 555 charges a capacitor through R1 and R2 in series, then discharges it through R2 alone, oscillating between one third and two thirds of the supply voltage. The asymmetry between the two paths is what sets the duty cycle.
The 0.693 is ln(2), which comes from the capacitor crossing between the one-third and two-thirds thresholds. Those thresholds are set by an internal resistor divider, which is why the frequency does not depend on supply voltage.
The duty cycle problem
Because R1 appears in the charging path but not the discharging one, the high time is always longer than the low time. The duty cycle is therefore always above 50% and can only approach it by making R2 very large compared with R1. To go below 50%, add a diode across R2 so charging bypasses it entirely — then t_high ≈ 0.693·R1·C and the two halves become independent.
Practical limits
- Keep R1 above about 1 kΩ. The discharge pin sinks the capacitor current directly and can be damaged.
- Total resistance above roughly 10 MΩ makes the timing drift with leakage and humidity.
- The bipolar NE555 draws several milliamps and injects a large current spike on every transition. Use a 100 nF decoupling capacitor right at the chip.
- For low-power or 3.3 V work, use a CMOS version such as the TLC555 or LMC555 instead.
Component tolerance dominates
The formula is exact; your parts are not. An electrolytic timing capacitor with a −20/+80% tolerance makes the calculated frequency little more than an estimate. For anything that needs to be accurate, use a film capacitor, or use a microcontroller timer instead.